Qualcomm Placement Papers 2026 with Solutions — Aptitude, Technical & Coding

Last Updated: March 2026 | Difficulty: High | Questions: 50+ with Solutions

Qualcomm Recruitment Process 2026 — Complete Overview

Qualcomm is a world leader in wireless technology and semiconductor design, powering the majority of smartphones worldwide with its Snapdragon processors. For the 2026 batch, Qualcomm is recruiting fresh graduates for roles like Software Engineer, Hardware Engineer, Systems Engineer, Modem Engineer, and DSP Engineer.

Qualcomm's selection process is highly rigorous, focusing on digital signal processing, embedded systems, C/C++ programming, computer architecture, and wireless communication fundamentals. The company offers exceptional compensation, cutting-edge technology exposure, and global career opportunities.

Why Join Qualcomm?

Pioneer in 5G, AI, and mobile computing technologies
Work on chips that power billions of devices worldwide
Strong culture of innovation and patent generation
Excellent compensation and benefits package

Qualcomm Eligibility Criteria 2026

Criteria	Requirements
Education	BE/B.Tech, M.Tech, MS (ECE, EEE, CSE preferred)
Batch	2024, 2025, 2026 passing out
CGPA/Percentage	Minimum 70% or 7.0 CGPA (preferably 75%+)
Backlogs	No active backlogs
Gap Year	Up to 1 year acceptable with valid reason

Qualcomm CTC for Freshers 2026

Role	CTC Package	Location
Software Engineer	₹18 - 25 LPA	Hyderabad, Bangalore
Hardware Engineer	₹16 - 22 LPA	Hyderabad, Bangalore
Systems Engineer	₹17 - 24 LPA	Hyderabad, Bangalore
Modem Engineer	₹19 - 26 LPA	Hyderabad
DSP Engineer	₹18 - 24 LPA	Hyderabad, Bangalore

Note: Qualcomm offers among the highest packages in the semiconductor industry, including base salary, RSUs, joining bonus, and comprehensive benefits.

Qualcomm Online Test Pattern 2026

Section	Questions	Time (Minutes)	Difficulty
Aptitude (Quant + Logical)	20	25	Moderate-High
Verbal Ability	10	15	Moderate
Technical (CS + ECE Core)	20	25	High
Coding	2-3	60	High
Total	52-53	125	High

Key Points:

No Negative Marking
Sectional Cut-offs: Yes, especially Technical (typically 60%+)
Coding Platform: HackerRank or proprietary
Languages Allowed: C, C++, Python

Section 1: Quantitative Aptitude (15 Questions)

Q1. A signal is sampled at 44.1 kHz. If each sample is 16 bits, what is the data rate?

Options: a) 705.6 kbps
b) 1.411 Mbps
c) 2.822 Mbps
d) 5.644 Mbps

Solution:

Data rate = Sampling rate × Bits per sample
= 44.1 × 10³ × 16 = 705,600 bits/second
= 705.6 kbps... wait, recheck: 44.1k × 16 = 705,600 bps = 705.6 kbps
But CD quality stereo = 2 × 705.6 = 1.411 Mbps
Answer: 1.411 Mbps (assuming stereo)

Q2. An FFT algorithm processes 1024 points. How many complex multiplications are needed (using radix-2)?

Options: a) 512
b) 1024
c) 5120
d) 10240

Solution:

Radix-2 FFT: (N/2) × log₂(N) complex multiplications
N = 1024, log₂(1024) = 10
Multiplications = (1024/2) × 10 = 512 × 10 = 5120

Q3. A FIR filter has 64 taps. What's the group delay in samples?

Options: a) 32
b) 64
c) 31.5
d) 63

Solution:

Linear phase FIR filter group delay = (N-1)/2
= (64-1)/2 = 63/2 = 31.5 samples

Q4. A UART transmits at 115200 baud with 8-N-1 configuration. What's the effective data rate?

Options: a) 92160 bps
b) 115200 bps
c) 100000 bps
d) 10417 Bps

Solution:

8-N-1 = 8 data bits, no parity, 1 stop bit + 1 start bit = 10 bits per byte
Data bits per frame = 8
Efficiency = 8/10 = 80%
Data rate = 115200 × 0.8 = 92160 bps

Q5. A cache has 64-byte lines and is 4-way set associative with 256 sets. What's the total cache size?

Options: a) 16 KB
b) 32 KB
c) 64 KB
d) 128 KB

Solution:

Cache size = Number of sets × Ways × Line size
= 256 × 4 × 64 bytes
= 256 × 256 = 65,536 bytes = 64 KB

Q6. An ADC has 12-bit resolution. What's the number of quantization levels?

Options: a) 256
b) 1024
c) 2048
d) 4096

Solution:

Quantization levels = 2^n where n = number of bits
= 2^12 = 4096

Q7. A DMA transfers data at 100 MB/s. How long to transfer 1 GB?

Options: a) 5 seconds
b) 10 seconds
c) 100 seconds
d) 1000 seconds

Solution:

Time = Data / Rate = 1 GB / 100 MB/s
= 1024 MB / 100 MB/s ≈ 10.24 seconds ≈ 10 seconds

Q8. A clock frequency is divided by a factor of 256. If input is 100 MHz, what's the output?

Options: a) 390.625 kHz
b) 25 MHz
c) 400 kHz
d) 1 MHz

Solution:

Output frequency = Input / Division factor
= 100 MHz / 256 = 100,000,000 / 256
= 390,625 Hz = 390.625 kHz

Q9. A pipeline has 5 stages. If each stage takes 2ns, what's the throughput?

Options: a) 100 MIPS
b) 200 MIPS
c) 500 MIPS
d) 1000 MIPS

Solution:

Clock period = 2 ns
Clock frequency = 1/(2×10⁻⁹) = 500 MHz
Assuming 1 instruction per cycle after pipeline fill
Throughput = 500 million instructions/second = 500 MIPS
Recheck: 1/2ns = 500 MHz = 500 MIPS
Answer: 500 MIPS (option c)

Q10. An I2C bus has 400 kHz clock. What's the approximate bit rate?

Options: a) 100 kbps
b) 400 kbps
c) 1 Mbps
d) 3.4 Mbps

Solution:

Standard mode I2C: 100 kHz = 100 kbps
Fast mode: 400 kHz = 400 kbps
Fast mode plus: 1 MHz
High speed mode: 3.4 MHz

Q11. A buffer is 50% full. After adding 100 bytes, it's 75% full. What's the total capacity?

Options: a) 200 bytes
b) 300 bytes
c) 400 bytes
d) 500 bytes

Solution:

75% - 50% = 25% = 100 bytes
Total capacity = 100 × 4 = 400 bytes

Q12. A convolution operation uses a 3×3 kernel on a 256×256 image. What's the output size with padding=1, stride=1?

Options: a) 254×254
b) 255×255
c) 256×256
d) 258×258

Solution:

Output size = (Input + 2×Padding - Kernel) / Stride + 1
= (256 + 2×1 - 3) / 1 + 1
= (256 + 2 - 3) + 1 = 256
Output: 256×256

Q13. A timer overflows every 1ms with a 16MHz clock. What's the prescaler value if counter counts up to 1000?

Options: a) 8
b) 16
c) 32
d) 64

Solution:

Clock cycles in 1ms = 16MHz × 1ms = 16,000
With prescaler P and count 1000: 16MHz / (P × 1000) = 1kHz
P = 16,000 / 1000 = 16

Q14. In a binary tree, what's the maximum number of nodes at level 4 (root is level 0)?

Options: a) 4
b) 8
c) 16
d) 32

Solution:

Maximum nodes at level k = 2^k
At level 4: 2⁴ = 16

Q15. A bus arbitration has 4 masters. How many grant lines are needed with independent requests?

Options: a) 1
b) 2
c) 4
d) 8

Solution:

Each master needs a grant line
4 grant lines needed

Section 2: Logical Reasoning (15 Questions)

Q1. If all DSPs are processors, some processors are multi-core, and all multi-core support threading, then:

Options: a) All DSPs support threading
b) Some DSPs are multi-core
c) Some processors support threading
d) No DSP supports threading

Solution:

Some processors → multi-core → threading
Therefore some processors support threading
Option c follows

Q2. Complete the series: 1, 2, 4, 8, 16, ?

Options: a) 24
b) 30
c) 32
d) 64

Solution:

Powers of 2: 2⁰=1, 2¹=2, 2²=4, 2³=8, 2⁴=16, 2⁵=32

Q3. If FREQUENCY is coded as 123456789, how is SIGNAL coded?

Options: a) 123456
b) 987654
c) 192837
d) 123450

Solution:

Sequential numbering
S-I-G-N-A-L = 123456

Q4. In a bus topology, Device A sends to Device D through B and C. How many hops?

Options: a) 2
b) 3
c) 4
d) 1

Solution:

Path: A → B → C → D
3 hops

Q5. Find the odd one: AND, OR, XOR, FFT

Options: a) AND
b) OR
c) XOR
d) FFT

Solution:

AND, OR, XOR are logic gates
FFT is an algorithm
FFT is the odd one

Q6. If rising edge triggers are used, when does sampling occur?

Options: a) Clock high
b) Clock low
c) Clock transition from low to high
d) Clock transition from high to low

Solution:

Rising edge = Low to High transition
Option c

Q7. What comes next: Z, X, V, T, ?

Options: a) R
b) S
c) Q
d) P

Solution:

Z(26), X(24), V(22), T(20)
Decreasing by 2
Next: 18 = R

Q8. Statement: All interrupts have priorities. Timer is an interrupt. Conclusion: Timer has priority.

Options: a) True
b) False
c) Cannot say
d) Irrelevant

Solution:

Valid syllogism
Conclusion is true

Q9. Complete: 3, 6, 11, 18, 27, ?

Options: a) 36
b) 38
c) 40
d) 42

Solution:

Differences: 3, 5, 7, 9, 11
Next: 27 + 11 = 38

Q10. In a memory hierarchy, if cache access is 1ns and DRAM is 100ns, what's the speedup factor?

Options: a) 10
b) 50
c) 100
d) 1000

Solution:

Speedup = DRAM time / Cache time
= 100ns / 1ns = 100

Q11. Statement: Big-endian stores MSB at lowest address. ARM supports big-endian. Conclusion: ARM stores MSB at lowest address in big-endian mode.

Options: a) True
b) False
c) Cannot say
d) Partially true

Q12. What comes next: 1, 8, 27, 64, ?

Options: a) 100
b) 125
c) 144
d) 216

Solution:

Cubes: 1³=1, 2³=8, 3³=27, 4³=64, 5³=125

Q13. If a buffer is circular with size 8, and head=5, tail=2, how many elements are stored?

Options: a) 2
b) 3
c) 5
d) 7

Solution:

Elements = (head - tail) mod size
= (5 - 2) mod 8 = 3?
If head is insertion point and tail is removal:
If tail < head: count = head - tail = 3
But if head < tail (wrapped): count = size - tail + head
With head=5, tail=2: 3 elements
Answer: b) 3

Q14. Complete: 256, 128, 64, 32, ?

Options: a) 8
b) 16
c) 24
d) 20

Solution:

Dividing by 2 each time
32 / 2 = 16

Q15. In a stack (LIFO), if push sequence is 1,2,3,4, which pop sequence is impossible?

Options: a) 4,3,2,1
b) 1,2,3,4
c) 2,1,4,3
d) 3,1,2,4

Solution:

To pop 3 first: push 1,2,3, pop 3
Stack has [1,2] with 2 on top
Next pop must be 2, not 1
3,1,2,4 is impossible

Section 3: Verbal Ability (10 Questions)

Q1. Choose the synonym of "OPTIMIZE"

Options: a) Worsen
b) Improve
c) Damage
d) Reduce

Q2. Choose the antonym of "VOLATILE"

Options: a) Unstable
b) Erratic
c) Stable
d) Unpredictable

Q3. Fill in the blank: The ___ implementation reduced power consumption by 30%.

Options: a) Inefficient
b) Optimized
c) Poor
d) Weak

Q4. Spot the error: "The set of algorithms are implemented in hardware."

Options: a) The set
b) of algorithms
c) are implemented
d) in hardware

Solution:

"Set" is singular, should be "is implemented"

Q5. Rearrange: (P) is critical (Q) low power (R) for mobile (S) design

Options: a) PQRS
b) QPRS
c) QRPS
d) QPSR

Solution:

"Low power is critical for mobile design"
Order: Q (Low power) + P (is critical) + R (for mobile) + S (design)

Q6. Choose the correctly spelled word:

Options: a) Architecure
b) Architecture
c) Architectur
d) Archtecture

Q7. Choose the meaning of idiom: "To be on the same wavelength"

Options: a) Same frequency
b) Understand each other
c) Radio communication
d) Technical problem

Q8. Active to Passive: "The engineer debugged the firmware."

Options: a) The firmware was debugged by the engineer
b) The firmware is debugged by the engineer
c) The firmware has been debugged by the engineer
d) The firmware had been debugged by the engineer

Q9. Choose the word most appropriate: "The ___ algorithm improved processing speed."

Options: a) Slow
b) Efficient
c) Poor
d) Weak

Q10. Choose the synonym of "ROBUST"

Options: a) Fragile
b) Strong
c) Weak
d) Delicate

Section 4: Technical / CS Fundamentals (10 Questions)

Q1. What does DMA stand for?

Options: a) Direct Memory Allocation
b) Direct Memory Access
c) Data Memory Architecture
d) Digital Memory Array

Q2. Which of the following is NOT a characteristic of RISC architecture?

Options: a) Simple instructions
b) Fixed instruction length
c) Many addressing modes
d) Load-store architecture

Solution:

RISC has few addressing modes (CISC has many)

Q3. What is the purpose of the Program Counter (PC)?

Options: a) Store data
b) Hold address of next instruction
c) Count programs
d) Store flags

Q4. Which cache write policy writes to both cache and memory simultaneously?

Options: a) Write-back
b) Write-through
c) Write-allocate
d) No-write-allocate

Q5. What is the Nyquist rate for a signal with maximum frequency 4kHz?

Options: a) 2 kHz
b) 4 kHz
c) 8 kHz
d) 16 kHz

Solution:

Nyquist rate = 2 × f_max = 2 × 4kHz = 8 kHz

Q6. Which of the following is a volatile memory?

Options: a) Flash
b) EEPROM
c) SRAM
d) ROM

Q7. In pipelining, what causes a data hazard?

Options: a) Branch instructions
b) Data dependencies between instructions
c) Cache miss
d) Interrupt

Q8. What is the main advantage of virtual memory?

Options: a) Faster access
b) Allows programs to use more memory than physical RAM
c) Cheaper memory
d) Non-volatile storage

Q9. Which modulation technique varies the phase of the carrier?

Options: a) AM
b) FM
c) PM
d) PCM

Q10. What is the purpose of a Memory Management Unit (MMU)?

Options: a) Manage CPU cache
b) Translate virtual addresses to physical addresses
c) Control DMA
d) Manage interrupts

Section 5: Coding Problems (5 Questions)

Q1. Implement a circular buffer (ring buffer) with thread-safety.

Solution (Python):

import threading

class CircularBuffer:
    def __init__(self, capacity):
        self.capacity = capacity
        self.buffer = [None] * capacity
        self.head = 0  # Write position
        self.tail = 0  # Read position
        self.size = 0  # Current size
        self.lock = threading.Lock()
        self.not_empty = threading.Condition(self.lock)
        self.not_full = threading.Condition(self.lock)
    
    def write(self, data):
        """Write data to buffer. Blocks if full."""
        with self.not_full:
            while self.size == self.capacity:
                self.not_full.wait()
            
            self.buffer[self.head] = data
            self.head = (self.head + 1) % self.capacity
            self.size += 1
            self.not_empty.notify()
    
    def read(self):
        """Read data from buffer. Blocks if empty."""
        with self.not_empty:
            while self.size == 0:
                self.not_empty.wait()
            
            data = self.buffer[self.tail]
            self.buffer[self.tail] = None  # Clear reference
            self.tail = (self.tail + 1) % self.capacity
            self.size -= 1
            self.not_full.notify()
            return data
    
    def try_write(self, data):
        """Non-blocking write. Returns True if successful."""
        with self.lock:
            if self.size == self.capacity:
                return False
            self.buffer[self.head] = data
            self.head = (self.head + 1) % self.capacity
            self.size += 1
            return True
    
    def try_read(self):
        """Non-blocking read. Returns data or None."""
        with self.lock:
            if self.size == 0:
                return None
            data = self.buffer[self.tail]
            self.buffer[self.tail] = None
            self.tail = (self.tail + 1) % self.capacity
            self.size -= 1
            return data
    
    def is_empty(self):
        with self.lock:
            return self.size == 0
    
    def is_full(self):
        with self.lock:
            return self.size == self.capacity

# Test
import time

def producer(buffer, items):
    for item in items:
        buffer.write(item)
        print(f"Produced: {item}")
        time.sleep(0.1)

def consumer(buffer, count):
    for _ in range(count):
        item = buffer.read()
        print(f"Consumed: {item}")
        time.sleep(0.2)

buf = CircularBuffer(5)
items = list(range(10))

t1 = threading.Thread(target=producer, args=(buf, items))
t2 = threading.Thread(target=consumer, args=(buf, 10))

t1.start()
t2.start()
t1.join()
t2.join()

Time Complexity: O(1) for read/write
Space Complexity: O(capacity)

Q2. Implement bit manipulation functions for embedded systems.

Solution (Python):

class BitManipulator:
    @staticmethod
    def set_bit(value, bit_position):
        """Set bit at position to 1"""
        return value | (1 << bit_position)
    
    @staticmethod
    def clear_bit(value, bit_position):
        """Clear bit at position to 0"""
        return value & ~(1 << bit_position)
    
    @staticmethod
    def toggle_bit(value, bit_position):
        """Toggle bit at position"""
        return value ^ (1 << bit_position)
    
    @staticmethod
    def check_bit(value, bit_position):
        """Check if bit at position is set"""
        return (value & (1 << bit_position)) != 0
    
    @staticmethod
    def modify_bit(value, bit_position, bit_value):
        """Set bit to specific value (0 or 1)"""
        mask = 1 << bit_position
        return (value & ~mask) | ((bit_value << bit_position) & mask)
    
    @staticmethod
    def get_lowest_set_bit(value):
        """Get position of lowest set bit"""
        if value == 0:
            return -1
        return (value & -value).bit_length() - 1
    
    @staticmethod
    def count_set_bits(value):
        """Count number of 1 bits (population count)"""
        count = 0
        while value:
            count += value & 1
            value >>= 1
        return count
    
    @staticmethod
    def count_set_bits_fast(value):
        """Fast population count using Brian Kernighan's algorithm"""
        count = 0
        while value:
            value &= value - 1  # Clear lowest set bit
            count += 1
        return count
    
    @staticmethod
    def reverse_bits(value, num_bits=32):
        """Reverse bits in value"""
        result = 0
        for i in range(num_bits):
            result <<= 1
            result |= value & 1
            value >>= 1
        return result
    
    @staticmethod
    def swap_nibbles(byte_value):
        """Swap upper and lower nibbles of a byte"""
        return ((byte_value & 0x0F) << 4) | ((byte_value & 0xF0) >> 4)
    
    @staticmethod
    def is_power_of_2(value):
        """Check if value is power of 2"""
        return value > 0 and (value & (value - 1)) == 0

# Test
bm = BitManipulator()
val = 0b1010  # 10 in decimal

print(f"Original: {bin(val)}")
print(f"Set bit 1: {bin(bm.set_bit(val, 1))}")  # 0b1110
print(f"Clear bit 3: {bin(bm.clear_bit(val, 3))}")  # 0b0010
print(f"Toggle bit 0: {bin(bm.toggle_bit(val, 0))}")  # 0b1011
print(f"Check bit 1: {bm.check_bit(val, 1)}")  # True
print(f"Count set bits: {bm.count_set_bits(val)}")  # 2
print(f"Reverse bits: {bin(bm.reverse_bits(val, 4))}")  # 0b0101
print(f"Is power of 2 (8): {bm.is_power_of_2(8)}")  # True
print(f"Is power of 2 (10): {bm.is_power_of_2(10)}")  # False

Q3. Implement a simple memory allocator (malloc/free simulation).

Solution (Python):

class MemoryBlock:
    def __init__(self, start, size, free=True):
        self.start = start
        self.size = size
        self.free = free
        self.next = None
        self.prev = None

class MemoryAllocator:
    def __init__(self, total_size):
        self.total_size = total_size
        self.memory = bytearray(total_size)
        # Initialize with one large free block
        self.head = MemoryBlock(0, total_size, True)
        self.allocations = {}  # Track allocated blocks
    
    def malloc(self, size):
        """Allocate memory of given size using first-fit algorithm"""
        current = self.head
        
        while current:
            if current.free and current.size >= size:
                # Found suitable block
                if current.size > size:
                    # Split block
                    new_block = MemoryBlock(
                        current.start + size,
                        current.size - size,
                        True
                    )
                    new_block.next = current.next
                    new_block.prev = current
                    if current.next:
                        current.next.prev = new_block
                    current.next = new_block
                
                current.size = size
                current.free = False
                self.allocations[current.start] = current
                return current.start
            
            current = current.next
        
        raise MemoryError(f"Cannot allocate {size} bytes")
    
    def free(self, addr):
        """Free memory at given address"""
        if addr not in self.allocations:
            raise ValueError(f"Invalid address: {addr}")
        
        block = self.allocations.pop(addr)
        block.free = True
        
        # Coalesce with next block if free
        if block.next and block.next.free:
            block.size += block.next.size
            block.next = block.next.next
            if block.next:
                block.next.prev = block
        
        # Coalesce with previous block if free
        if block.prev and block.prev.free:
            block.prev.size += block.size
            block.prev.next = block.next
            if block.next:
                block.next.prev = block.prev
    
    def get_stats(self):
        """Get memory statistics"""
        total_free = 0
        total_used = 0
        free_blocks = 0
        used_blocks = 0
        
        current = self.head
        while current:
            if current.free:
                total_free += current.size
                free_blocks += 1
            else:
                total_used += current.size
                used_blocks += 1
            current = current.next
        
        return {
            'total': self.total_size,
            'used': total_used,
            'free': total_free,
            'used_blocks': used_blocks,
            'free_blocks': free_blocks
        }
    
    def display_map(self):
        """Display memory map"""
        current = self.head
        print("Memory Map:")
        while current:
            status = "FREE" if current.free else "USED"
            print(f"  [{current.start:4d}:{current.start+current.size:4d}] {status:4s} ({current.size} bytes)")
            current = current.next

# Test
allocator = MemoryAllocator(1024)

# Allocate some memory
addr1 = allocator.malloc(100)
addr2 = allocator.malloc(200)
addr3 = allocator.malloc(150)

print("After allocations:")
allocator.display_map()
print(f"Stats: {allocator.get_stats()}")

# Free middle block
allocator.free(addr2)
print("\nAfter freeing addr2:")
allocator.display_map()
print(f"Stats: {allocator.get_stats()}")

# Allocate again - should use freed space
addr4 = allocator.malloc(180)
print("\nAfter new allocation:")
allocator.display_map()
print(f"Stats: {allocator.get_stats()}")

Q4. Implement a fixed-point arithmetic library for DSP applications.

Solution (Python):

class FixedPoint:
    """
    Fixed-point arithmetic for embedded/DSP applications
    Qm.n format: m integer bits, n fractional bits
    """
    def __init__(self, value, int_bits=16, frac_bits=16):
        self.int_bits = int_bits
        self.frac_bits = frac_bits
        self.total_bits = int_bits + frac_bits
        self.scale = 1 << frac_bits
        
        if isinstance(value, float):
            self.value = int(round(value * self.scale))
        elif isinstance(value, int):
            self.value = value
        else:
            raise TypeError("Value must be int or float")
        
        self._saturate()
    
    def _saturate(self):
        """Saturate to prevent overflow"""
        max_val = (1 << (self.total_bits - 1)) - 1
        min_val = -(1 << (self.total_bits - 1))
        
        if self.value > max_val:
            self.value = max_val
        elif self.value < min_val:
            self.value = min_val
    
    def to_float(self):
        """Convert to floating point"""
        return self.value / self.scale
    
    def __add__(self, other):
        if isinstance(other, FixedPoint):
            result = self.value + other.value
        else:
            result = self.value + int(other * self.scale)
        return FixedPoint(result, self.int_bits, self.frac_bits)
    
    def __sub__(self, other):
        if isinstance(other, FixedPoint):
            result = self.value - other.value
        else:
            result = self.value - int(other * self.scale)
        return FixedPoint(result, self.int_bits, self.frac_bits)
    
    def __mul__(self, other):
        if isinstance(other, FixedPoint):
            # Multiply and rescale
            result = (self.value * other.value) >> self.frac_bits
        else:
            result = int(self.value * other)
        return FixedPoint(result, self.int_bits, self.frac_bits)
    
    def __truediv__(self, other):
        if isinstance(other, FixedPoint):
            # Scale up before division
            result = (self.value << self.frac_bits) // other.value
        else:
            result = int(self.value / other)
        return FixedPoint(result, self.int_bits, self.frac_bits)
    
    def __repr__(self):
        return f"FixedPoint({self.to_float():.6f}, Q{self.int_bits}.{self.frac_bits})"

class DSPFunctions:
    """Common DSP operations using fixed-point arithmetic"""
    
    @staticmethod
    def fir_filter(samples, coefficients):
        """
        FIR filter implementation
        y[n] = sum(b[k] * x[n-k])
        """
        result = []
        order = len(coefficients)
        
        for i in range(len(samples)):
            acc = FixedPoint(0.0)
            for j in range(order):
                if i - j >= 0:
                    acc = acc + samples[i - j] * coefficients[j]
            result.append(acc)
        
        return result
    
    @staticmethod
    def moving_average(samples, window_size):
        """Simple moving average filter"""
        result = []
        coef = FixedPoint(1.0 / window_size)
        
        for i in range(len(samples)):
            window_sum = FixedPoint(0.0)
            count = 0
            for j in range(window_size):
                if i - j >= 0:
                    window_sum = window_sum + samples[i - j]
                    count += 1
            if count > 0:
                result.append(window_sum * (1.0 / count))
            else:
                result.append(FixedPoint(0.0))
        
        return result
    
    @staticmethod
    def dft(samples):
        """Discrete Fourier Transform (naive implementation)"""
        import math
        N = len(samples)
        result = []
        
        for k in range(N):
            real = FixedPoint(0.0)
            imag = FixedPoint(0.0)
            for n in range(N):
                angle = -2 * math.pi * k * n / N
                real = real + samples[n] * FixedPoint(math.cos(angle))
                imag = imag + samples[n] * FixedPoint(math.sin(angle))
            result.append((real, imag))
        
        return result

# Test
print("=== Fixed-Point Arithmetic Test ===")
a = FixedPoint(3.14159, int_bits=8, frac_bits=8)
b = FixedPoint(2.71828, int_bits=8, frac_bits=8)

print(f"a = {a}")
print(f"b = {b}")
print(f"a + b = {a + b}")
print(f"a - b = {a - b}")
print(f"a * b = {a * b}")
print(f"a / b = {a / b}")

# FIR filter test
print("\n=== FIR Filter Test ===")
coefs = [FixedPoint(0.25), FixedPoint(0.25), FixedPoint(0.25), FixedPoint(0.25)]
signal = [FixedPoint(float(i)) for i in [1, 2, 3, 4, 5, 4, 3, 2, 1]]
filtered = DSPFunctions.fir_filter(signal, coefs)
print("Input:", [s.to_float() for s in signal])
print("Output:", [f.to_float() for f in filtered])

# Moving average test
print("\n=== Moving Average Test ===")
ma_filtered = DSPFunctions.moving_average(signal, 3)
print("Moving Average:", [f.to_float() for f in ma_filtered])

Q5. Implement a state machine parser for a simple protocol.

Solution (Python):

from enum import Enum, auto

class State(Enum):
    IDLE = auto()
    SYNC = auto()
    LENGTH = auto()
    DATA = auto()
    CHECKSUM = auto()
    COMPLETE = auto()
    ERROR = auto()

class ProtocolParser:
    """
    Simple protocol parser:
    [SYNC:2 bytes][LENGTH:1 byte][DATA:LENGTH bytes][CHECKSUM:1 byte]
    """
    SYNC_BYTES = b'\xAA\x55'
    
    def __init__(self):
        self.reset()
    
    def reset(self):
        self.state = State.IDLE
        self.buffer = bytearray()
        self.length = 0
        self.data = bytearray()
        self.expected_checksum = 0
        self.sync_index = 0
    
    def process_byte(self, byte):
        """Process a single byte and return True if packet complete"""
        byte = byte if isinstance(byte, int) else ord(byte)
        
        if self.state == State.IDLE:
            if byte == self.SYNC_BYTES[0]:
                self.state = State.SYNC
                self.sync_index = 1
                self.buffer = bytearray([byte])
        
        elif self.state == State.SYNC:
            if byte == self.SYNC_BYTES[1]:
                self.buffer.append(byte)
                self.state = State.LENGTH
            elif byte == self.SYNC_BYTES[0]:
                self.sync_index = 1
            else:
                self.reset()
        
        elif self.state == State.LENGTH:
            self.length = byte
            self.buffer.append(byte)
            self.data = bytearray()
            if self.length > 0 and self.length <= 255:
                self.state = State.DATA
            else:
                self.state = State.ERROR
        
        elif self.state == State.DATA:
            self.data.append(byte)
            self.buffer.append(byte)
            if len(self.data) >= self.length:
                self.state = State.CHECKSUM
        
        elif self.state == State.CHECKSUM:
            self.buffer.append(byte)
            calculated = self._calculate_checksum()
            if byte == calculated:
                self.state = State.COMPLETE
                return True
            else:
                self.state = State.ERROR
        
        return False
    
    def process_stream(self, data):
        """Process a stream of bytes"""
        packets = []
        for byte in data:
            if self.process_byte(byte):
                packets.append(self.get_packet())
                self.reset()
            elif self.state == State.ERROR:
                self.reset()
        return packets
    
    def _calculate_checksum(self):
        """Calculate simple checksum (XOR of all data bytes)"""
        checksum = 0
        for byte in self.data:
            checksum ^= byte
        return checksum
    
    def get_packet(self):
        """Get the parsed packet"""
        if self.state == State.COMPLETE:
            return {
                'length': self.length,
                'data': bytes(self.data),
                'checksum': self._calculate_checksum(),
                'raw': bytes(self.buffer)
            }
        return None
    
    def create_packet(self, data):
        """Create a valid packet from data"""
        if len(data) > 255:
            raise ValueError("Data too long (max 255 bytes)")
        
        packet = bytearray()
        packet.extend(self.SYNC_BYTES)
        packet.append(len(data))
        packet.extend(data)
        
        # Calculate checksum
        checksum = 0
        for byte in data:
            checksum ^= byte
        packet.append(checksum)
        
        return bytes(packet)

# Test
parser = ProtocolParser()

# Create test packets
data1 = b'Hello'
data2 = b'World!'
packet1 = parser.create_packet(data1)
packet2 = parser.create_packet(data2)

# Combine into stream with some noise
stream = b'\x00\x01' + packet1 + b'\xFF\xFE' + packet2 + b'\xAB'

print("Created packets:")
print(f"Packet 1: {packet1.hex()}")
print(f"Packet 2: {packet2.hex()}")
print(f"\nTest stream: {stream.hex()}")

# Parse
parser.reset()
packets = parser.process_stream(stream)

print(f"\nParsed {len(packets)} packets:")
for i, pkt in enumerate(packets):
    print(f"  Packet {i+1}: {pkt}")

# Test with single byte processing
print("\n=== Single Byte Processing ===")
parser.reset()
test_data = packet1
for byte in test_data:
    complete = parser.process_byte(byte)
    print(f"Byte: 0x{byte:02X}, State: {parser.state.name}, Complete: {complete}")

Qualcomm Interview Tips 2026

1. Master Computer Architecture

Qualcomm interviews heavily focus on computer architecture. Study pipelining, cache hierarchies, memory management, and instruction set architectures (ARM specifically). Understand the trade-offs between RISC and CISC.

2. Study Digital Signal Processing (DSP)

For hardware/modem roles, DSP fundamentals are crucial. Know FFT, FIR/IIR filters, sampling theory, modulation techniques, and quantization. Practice implementing algorithms efficiently.

3. Know C/C++ Inside Out

Embedded systems programming is primarily in C/C++. Be comfortable with pointers, memory management, bit manipulation, and writing efficient code. Know the difference between stack and heap allocation.

4. Understand Wireless Communication

Study 4G LTE, 5G NR basics, OFDM, MIMO, and channel coding. Understand how modems work and the challenges in wireless communication (interference, fading, etc.).

5. Practice Low-Level Optimization

Qualcomm values efficient code. Practice optimizing algorithms for memory usage, cache performance, and execution speed. Know Big-O analysis and when it doesn't tell the whole story.

6. Prepare for Hardware-Software Co-design Questions

Be ready to discuss how software interacts with hardware, device drivers, interrupt handling, DMA, and memory-mapped I/O.

7. Review Previous Qualcomm Papers

Qualcomm has consistent question patterns. Solve previous year papers to understand the difficulty level and question types. Focus on areas where you're weak.

Frequently Asked Questions

What is the Qualcomm placement paper pattern for 2026?

What is the difficulty level of Qualcomm technical test?

How to prepare for Qualcomm placement in 1 month?

Week 1: Master computer architecture (pipelining, caches, memory hierarchy), ARM architecture basics
Week 2: Study DSP fundamentals (FFT, filters, sampling), embedded C programming, bit manipulation
Week 3: Practice coding (arrays, pointers, strings, bit operations), solve previous Qualcomm papers
Week 4: Review OS concepts, wireless communication basics, take mock tests, focus on weak areas Daily study of 5-6 hours with emphasis on problem-solving is recommended.

What is the CTC offered by Qualcomm for freshers in 2026?

Software Engineer: ₹18 - 25 LPA
Hardware Engineer: ₹16 - 22 LPA
Systems Engineer: ₹17 - 24 LPA
Modem Engineer: ₹19 - 26 LPA
DSP Engineer: ₹18 - 24 LPA Packages include competitive base salary, RSUs, joining bonus, health insurance, and other benefits.

What skills are most important for Qualcomm roles?

Core Skills: C/C++, data structures, algorithms, computer architecture
Hardware: Digital design, Verilog/VHDL basics, ARM architecture
DSP: Signal processing fundamentals, filter design
Embedded: RTOS, memory management, device drivers
Communication: Wireless protocols, modulation techniques
Soft Skills: Problem-solving, innovation mindset, teamwork

Best of luck with your Qualcomm placement preparation! Focus on building strong fundamentals in computer architecture and embedded systems.